Distributed loss compensation for low-latency on-chip interconnectsJanuary 2006/in Circuits for intrachip communications, Publications/by awp-adminA. P. Jose and K. L. Shepard, “Distributed loss compensation for low-latency on-chip interconnects” Digest of Technical Papers, International Solid-State Circuits Conference, 2006. /wp-content/uploads/2017/08/bioee-logo-rec.jpg 0 0 awp-admin /wp-content/uploads/2017/08/bioee-logo-rec.jpg awp-admin2006-01-04 15:22:412020-07-20 11:54:27Distributed loss compensation for low-latency on-chip interconnects
