Layout parasitic extraction using Calibre PEX


If you haven't read the CAD tool information page, READ THAT FIRST.

In this handout, we will learn how to extract layout with Calibre PEX and simulate (with Spectre) from the extracted layout.

Now that you have completed a layout, it is time to find out how good it is. The extraction takes your layout and makes a more realistic model based on physical-structural properties. For example, it would make no difference if you had a 100n long wire or 100u long wire in your schematic, but it would certainly affect its physical properties (R, C) in your layout, and hence your calibre extraction.

An extraction runs DRC and LVS again, then models the parasitic components. You can use this extracted model to simulate in Spectre and compare it with the results from your schematic.





Now it's time to simulate what we extracted. Open your 'inverter_test' schematic again. Open your spectre view by doing  Launch -> ADE L .  If you have already forgotten about spectre simulations, refer to: On-line CISL CAD tutorial on Spectre simulation through the Analog Design Environment (ADE).

Load your saved state from before which includes library data, temperature, simulation data, etc. If you have not saved your spectre environment, follow the link above to go through the settings again. After that we need only change one thing to simulate our extraction rather than our schematic. Go to  Setup -> Environment  and at the topmost line, enter calibre before schematic, with a space separating each word. The window should look like this:



Finally, hit "Netlist and run". Display your input and output transient results, and you will see a very similar result from the schematic simulation results. It is because a simple inverter does not require complicated modeling. Try comparing the two output waveforms and delay times.


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