Harsh Bais, PhD

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Lab Member Profile


Peter Levine

Peter Levine

Ph.D. Candidate, Electrical Engineering, Columbia University, 2004-Present
M.Phil., Electrical Engineering, Columbia University, 2004-2007
M.Eng., Electrical Engineering, McGill University, 2002-2004
B.Eng., Computer Engineering, McGill University, 1997-2001

plevine AT cisl.columbia.edu

Link to CV

Research Summary

My research involves the development of CMOS electrochemical sensor arrays for on-chip DNA detection.

Fellowships

Intel Foundation Ph.D. Fellowship, 2005-2006

Publications

    P. M. Levine, P. Gong, R. Levicky, and K. L. Shepard, "Active CMOS sensor array for electrochemical biomolecular detection," IEEE Journal of Solid-State Circuits, vol. 43, no. 8, pp. 1859-1871, Aug. 2008.

    P. M. Levine, P. Gong, K. L. Shepard, and R. Levicky, "Active CMOS array for electrochemical sensing of biomolecules," Proc. IEEE Custom Integrated Circuits Conference, Sept. 2007, pp. 825-828.

    P. M. Levine and G. W. Roberts, "High-resolution flash time-to-digital conversion and calibration for system-on-chip testing," Embedded Microelectronic Systems: Status and Trends, B. M. Al-Hashimi, Ed. London: IEE Press, 2006.

    P. M. Levine and G. W. Roberts, "High-resolution flash time-to-digital conversion and calibration for system-on-chip testing," IEE Proceedings on Computers and Digital Techniques, May 2005, pp. 415-426.

    P. M. Levine and G. W. Roberts, "A high-resolution flash time-to-digital converter and calibration scheme," Proc. International Test Conference, Oct. 2004, pp. 1148-1157.

    P. M. Levine and G. W. Roberts, "A calibration technique for a high-resolution flash time-to-digital converter," Proc. IEEE International Symposium on Circuits and Systems, May 2004, pp. 253-256.