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Measurement and modelling of variability in nanometer-scale CMOS
 Process variability is a critical concern in nanometer-scale CMOS, owing to random device fluctuations (dopant fluctuation, line-edge roughness) and also reticle and proximity effects, which have difficult-to-predict impacts on device characteristics. Traditionally, process variability is characterized by one of two methods: either individual devices with pads are characterized on an automated wafer stepper or a 'silicon dense' structure of ring oscillators is used to find correlations between frequency and variation. The first method provides high accuracy at the cost of large area overhead and low information throughput. The second method, although providing higher throughput, 'integrates' all the characteristics of multiple devices into one measured number dramatically reducing information content. Recent methods focus on multiplexed transistor arrays because they provide high-density access to multiple devices for characterization. In our own work, we have been designing on-chip current-voltage measurement circuits that allows for rapid characteriaation of a large, dense array of multiplexed devices, eliminating the effects of switch resistances and allowing for current measurement to nanoAmpere scales. The die photo below shows one of these characterization arrays.
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